<?xml version="1.0" encoding="utf-8" ?> <rss version="2.0" xmlns:opensearch="http://a9.com/-/spec/opensearch/1.1/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:atom="http://www.w3.org/2005/Atom"> <channel> <title> <![CDATA[ Search for 'su:&quot;VLSI design&quot;']]> </title> <link> https://catalog.riphah.edu.pk//cgi-bin/koha/opac-search.pl?q=ccl=su%3A%22VLSI%20design%22&#38;sort_by=relevance&#38;format=rss </link> <atom:link rel="self" type="application/rss+xml" href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-search.pl?q=ccl=su%3A%22VLSI%20design%22&#38;sort_by=relevance&#38;format=rss"/> <description> <![CDATA[ Search results for 'su:&quot;VLSI design&quot;' at ]]> </description> <opensearch:totalResults>12</opensearch:totalResults> <opensearch:startIndex>0</opensearch:startIndex> <opensearch:itemsPerPage>50</opensearch:itemsPerPage> <atom:link rel="search" type="application/opensearchdescription+xml" href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-search.pl?q=ccl=su%3A%22VLSI%20design%22&#38;sort_by=relevance&#38;format=opensearchdescription"/> <opensearch:Query role="request" searchTerms="q%3Dccl%3Dsu%253A%2522VLSI%2520design%2522" startPage="" /> <item> <title> Algorithms for VLSI design automation </title> <dc:identifier>ISBN:8126508213 (pbk) </dc:identifier> <link>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=3357</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8126508213.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Gerez, Sabih H. .<br /> New Delhi Wiley India 2007 .<br /> xiii, 326 p. ; 21 cm. .<br /> 8126508213 (pbk) </p> ]]> <![CDATA[ <p> <a href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-reserve.pl?biblionumber=3357">Place hold on <em>Algorithms for VLSI design automation </em></a> </p> ]]> </description> <guid>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=3357</guid> </item> <item> <title> Algorithms for VLSI physical design automation </title> <dc:identifier>ISBN:9788181283177 (pbk)</dc:identifier> <link>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=3569</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8181283171.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Sherwani, Naveed A..<br /> New Delhi Springer (India) Private Limited. 1999 .<br /> xv, 572 p. , Includes index. ; 22 cm..<br /> 9788181283177 (pbk) </p> ]]> <![CDATA[ <p> <a href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-reserve.pl?biblionumber=3569">Place hold on <em>Algorithms for VLSI physical design automation </em></a> </p> ]]> </description> <guid>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=3569</guid> </item> <item> <title> Design through verilog HDL </title> <dc:identifier>ISBN:9812531319 (pbk)</dc:identifier> <link>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=3615</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/9812531319.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Padmanabhan, T.R. | B. Bala Tripura .<br /> Canada IEEE Press 2004 .<br /> xii, 455 p. , Index Included. ; 22 cm..<br /> 9812531319 (pbk) </p> ]]> <![CDATA[ <p> <a href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-reserve.pl?biblionumber=3615">Place hold on <em>Design through verilog HDL </em></a> </p> ]]> </description> <guid>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=3615</guid> </item> <item> <title> Analog and mixed mode VLSI design </title> <dc:identifier>ISBN:9788120342293 (pbk)</dc:identifier> <link>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=11807</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8120342291.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Gejji, Vineeta P. .<br /> New Delhi PHI Learning 2011 .<br /> xiii, 138 p. , Includes bibliographical references and index. ; 24 cm..<br /> 9788120342293 (pbk) </p> ]]> <![CDATA[ <p> <a href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-reserve.pl?biblionumber=11807">Place hold on <em>Analog and mixed mode VLSI design</em></a> </p> ]]> </description> <guid>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=11807</guid> </item> <item> <title> VLSI design with VHDL Analog and digital </title> <dc:identifier>ISBN:8188458333 (pbk) | 9788188458332 (pbk)</dc:identifier> <link>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=11817</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8188458333.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Singh, K. R.<br /> New Delhi S.K. Kataria &amp; sons 2010 .<br /> xviii, 496 p. , Includes index. ; 24 cm..<br /> 8188458333 (pbk) | 9788188458332 (pbk) </p> ]]> <![CDATA[ <p> <a href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-reserve.pl?biblionumber=11817">Place hold on <em>VLSI design with VHDL</em></a> </p> ]]> </description> <guid>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=11817</guid> </item> <item> <title> VLSI test principles and architectures design for test ability </title> <dc:identifier>ISBN:9789380501550 (pbk) | 9780123705976 (pbk)</dc:identifier> <link>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=12416</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/9380501552.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Laung-Terng Wang (editor) | Cheng-Wen Wu (editor) | Xiaoqing Wen (editor).<br /> India Elsevier 2006 .<br /> xxx, 777 p. , Includes bibliographical references and index. ; 24 cm..<br /> 9789380501550 (pbk) | 9780123705976 (pbk) </p> ]]> <![CDATA[ <p> <a href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-reserve.pl?biblionumber=12416">Place hold on <em>VLSI test principles and architectures</em></a> </p> ]]> </description> <guid>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=12416</guid> </item> <item> <title> Genetic algorithms for VLSI design, layout and test automation </title> <dc:identifier>ISBN:8177585746 (pbk)</dc:identifier> <link>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=13136</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8177585746.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Mazumder, Pinaki | Elizabeth M. Rudnick.<br /> New Delhi Dorling kindersley 1999 .<br /> xiii, 338 p. , Includes glossary, bibliography and index. ; 24 cm..<br /> 8177585746 (pbk) </p> ]]> <![CDATA[ <p> <a href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-reserve.pl?biblionumber=13136">Place hold on <em>Genetic algorithms</em></a> </p> ]]> </description> <guid>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=13136</guid> </item> <item> <title> VLSI test principles and architectures design for test ability </title> <dc:identifier>ISBN:9789380501550 (pbk) | 9780123705976 (pbk)</dc:identifier> <link>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=15295</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/9380501552.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Laung-Terng Wang (editor) | Cheng-Wen Wu (editor) | Xiaoqing Wen (editor).<br /> New Delhi Elsevier 2013 .<br /> xxx, 777 p. , Includes bibliographical references and index. ; 24 cm..<br /> 9789380501550 (pbk) | 9780123705976 (pbk) </p> ]]> <![CDATA[ <p> <a href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-reserve.pl?biblionumber=15295">Place hold on <em>VLSI test principles and architectures</em></a> </p> ]]> </description> <guid>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=15295</guid> </item> <item> <title> Design through verilog HDL </title> <dc:identifier>ISBN:9788126519316 (pbk)</dc:identifier> <link>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=15728</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8126519312.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Padmanabhan, T.R. | B. Bala Tripura Sundari.<br /> New Delhi Wiley India (P.) Ltd. 2013 .<br /> xii, 455 p. , Includes bibliographical references and index ; 23 cm..<br /> 9788126519316 (pbk) </p> ]]> <![CDATA[ <p> <a href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-reserve.pl?biblionumber=15728">Place hold on <em>Design through verilog HDL </em></a> </p> ]]> </description> <guid>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=15728</guid> </item> <item> <title> Practical low power digital VLSI design </title> <dc:identifier>ISBN:9788184891874 (pbk)</dc:identifier> <link>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=15823</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8184891873.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Yeap, Gary..<br /> New Delhi Springer Pvt. Ltd. 2013 .<br /> xiii, 212 p. , Includes bibliographic references and index ; 22 cm..<br /> 9788184891874 (pbk) </p> ]]> <![CDATA[ <p> <a href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-reserve.pl?biblionumber=15823">Place hold on <em>Practical low power digital VLSI design</em></a> </p> ]]> </description> <guid>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=15823</guid> </item> <item> <title> CMOS VLSI design a circuits and systems perspective </title> <dc:identifier>ISBN:9789332542884 (pbk)</dc:identifier> <link>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=24826</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/9332542880.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Weste, Neil H.E. | David Money Harris.<br /> India Pearson Education 2015 .<br /> xxv, 838 p. , includes index ; 25 cm..<br /> 9789332542884 (pbk) </p> ]]> <![CDATA[ <p> <a href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-reserve.pl?biblionumber=24826">Place hold on <em>CMOS VLSI design </em></a> </p> ]]> </description> <guid>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=24826</guid> </item> <item> <title> Introduction to VLSI design and technology </title> <dc:identifier>ISBN:9788122430646 (hb)</dc:identifier> <link>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=37360</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8122430643.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Roy, J. N. | D.N. Bose.<br /> New Delhi New Age International (P) Ltd., Publishers 2011 .<br /> xiv, 488 p. , Includes bibliographical references and index. ; 25 cm..<br /> 9788122430646 (hb) </p> ]]> <![CDATA[ <p> <a href="https://catalog.riphah.edu.pk//cgi-bin/koha/opac-reserve.pl?biblionumber=37360">Place hold on <em>Introduction to VLSI design and technology</em></a> </p> ]]> </description> <guid>https://catalog.riphah.edu.pk//cgi-bin/koha/opac-detail.pl?biblionumber=37360</guid> </item> </channel> </rss>
