VLSI test principles and architectures (Record no. 15295)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00649nam a22001577a 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9789380501550 (pbk) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9780123705976 (pbk) |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.395 |
| Author Mark | VLS |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Authorship | Laung-Terng Wang (editor) |
| -- | Cheng-Wen Wu (editor) |
| -- | Xiaoqing Wen (editor) |
| 245 ## - TITLE STATEMENT | |
| Title | VLSI test principles and architectures |
| Sub Title | design for test ability |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | New Delhi |
| Name of publisher | Elsevier |
| Date of publication | 2013 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | xxx, 777 p. |
| Illustrations | : ill. |
| Dimensions | ; 24 cm. |
| 500 ## - GENERAL NOTE | |
| General note | Includes bibliographical references and index. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Subject | VLSI |
| -- | Design for test ability |
| Keywords | VLSI life-cycle |
| -- | level of abstraction in VLSI |
| -- | Fault simulation |
| -- | Test generation |
| -- | Test compression |
| -- | FEAS |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| item type | Books |
| Withdrawn status | Lost status | Damaged status | Not for loan | Home library | Current library | Source of acquisition | Cost, normal purchase price | Full call number | Barcode | Copy number | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Main Campus | Main Campus | Purchased: Pak Book Corporation | 1157.00 | 621.395 VLS | 28169 | 1 | Books |