00505nam a22001217a 4500020002300000082001700023100004500040245006000085260005200145300003300197500005100230650010200281  a9788181285867 (hb)  a621.395bMAH  aMaheshwari, NareshaSachin S. Sapatnekar  aTiming analysis and optimization of sequential circuits  aNew DelhibSpringer India Private Limitedc1999  axv, 190 p.b: ill.c; 23 cm.  aIncludes index and bibliographical references.  aSystem engineeringaData processingvSkew optimizationvControl logicvCircuitsvAlgorithmsvFEAS