Navabi, Zainalabedin <br/><br/>
Digital system test and testable design  using HDL models and architecture 

 - New Delhi  Springer (India) Private Limited  2014 
 - xxii, 435 p.  : ill.  ; 24 cm. 
<br/><br/> Includes index. 
<br/><br/><label>ISBN: </label>9788132214403 (pbk) 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Systems engineering<br/>Engineering--Digital integrated circuits--System verilog--Mathematics--Verilog--FEAS
<br/><br/><label>Dewey Class. No.: </label>621.381548  / NAV