00596nam a22001217a 4500020002400000082001700024100002400041245009900065260005900164300004200223500002000265650018900285  a9780070252219 (pbk)  a621.392bNAV  aNavabi Zainalabedin  aVerilog digital system designbRegistered transfer level synthesis, testbench and verification  aNew DelhibMcGraw Hill Education Private Limitedc2008  axvi, 384 p.b: ill.c; 22 cm.e+ 1 CD  aIncludes index.  aVerilog computer hardware description languageaElectronic digital computer vVerlog sinatation modelvTiming devicesvSefuentia analysisvSorting devicesvHierochical structuresvFEAS