Sherwani, Naveed A. <br/><br/>
Algorithms for VLSI physical design automation  

 - New Delhi   Springer (India) Private Limited.  1999 
 - xv, 572 p.  : ill.  ; 22 cm. 
<br/><br/> Includes index. 
<br/><br/><label>ISBN: </label>9788181283177 (pbk) 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Algorithms --Floorplanning pin assignment --Clock power routing --VLSI design --Transistor fundamentals --Fabrication process --Global routing --FEAS 
<br/><br/><label>Dewey Class. No.: </label>621.395  / SHE