TY  - BOOK
AU  - Sherwani, Naveed A.
TI  - Algorithms for VLSI physical design automation 
SN  - 9788181283177 (pbk)
U1  - 621.395 
PY  - 1999///
CY  - New Delhi 
PB  - Springer (India) Private Limited.
KW  - Algorithms
KW  - Floorplanning pin assignment
KW  - Clock power routing
KW  - VLSI design
KW  - Transistor fundamentals
KW  - Fabrication process
KW  - Global routing
KW  - FEAS
N1  - Includes index
ER  -