Yalamanchili, Sudhakar <br/><br/>
Introductory VHDL  from simulation to synthesis  

 - New Delhi   Pearson Education   2001 
 - xix, 401 p.  : ill.  ; 23 cm. 
<br/><br/> Includes index. 
<br/><br/><label>ISBN: </label>8178085585 (pbk) 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Computer architecture--Modeling digital systems --Simulation model --Modeling behavior --FEAS 
<br/><br/><label>Dewey Class. No.: </label>621.392  / YAL