000			00553nam a22001457a 4500
020			_a9788181285867 (hb)
082			_a621.395 _bMAH
100			_aMaheshwari, Naresh _aSachin S. Sapatnekar
245			_aTiming analysis and optimization of sequential circuits
260			_aNew Delhi _bSpringer India Private Limited _c1999
300			_axv, 190 p. _b: ill. _c; 23 cm.
500			_aIncludes index and bibliographical references.
650			_aSystem engineering _aData processing _vSkew optimization _vControl logic _vCircuits _vAlgorithms _vFEAS
942			_cBK
999			_c12227 _d12227